1、1. In Layout Editing window, select Verify LVS. Figure 41 should appear. Use the Browse button in LVS window to select that schematic and extracted view you are going to check for equivalence.You should have LVS window as Figure 41. Just click run to start.Figure 41. Running LVS2. When the LVS check
2、 is successful, Figure 42 should appear.Figure 42. Successful completion of an LVS checkTo find your extracted view of inverter, go to library manager and select extracted view. Your extracted view should be like Figure 43.You can see two transistors and a parasitic capacitor which could affect the
3、performance of your inverter.Figure 43. Extracted view of the inverterIn order to perform post extraction simulation, 1. Open up your INV_TB schematic, and start the Affirma Environment.2. Set up simulation environment like Figure 44. (check Simulation in spectre(S) using the Affirma Environment)Fig
4、ure 44. Setting for post simulation3. In Affirma Environment window, Select Setup Environment. 4. In the Environment Options, insert extracted view before the spectreS in the Switch View List like in Figure 45.Figure 45. Inserting extracted view5. Click OK and run simulation. The result should appear like in Figure 46.Figure 46. Post simulation resultIf your circuit meets the specifications, you would be done. If it is not, you would have to change design parameters and do again DRC, Extract, and re-simulate.
