EECS152ComputerArchitectureandEngineeringLec01[0001].ppt

1、1,Spring 2016 ZDMC Lec. #1 8,数字系统设计Digital System Design,王维东Weidong Wang 浙江大学信息与电子工程学院College of Information Science & Electronic Engineering信息与通信工程研究所Zhejiang University,-存储器,2,Spring 2016 ZDMC Lec. #1 8,任课教师,王维东浙江大学信息与电子工程学院, 信电楼306邮箱：College of Information Science & Electronic EngineeringZhejiang

2、 University, Hangzhou, 310027Tel: 86-571-87953170 (O)Mobile: 13605812196,TA:陈彬彬 Binbin CHEN, 13071888906; ；黄露 Lu HUANG，6719473; ;Tuesday & Thursday 14:00-16:30 PM Office Hours：玉泉信电楼 308室（可以微信或邮件联系）.,Prerequisites预修课程,电子电路基础电子线路C语言How to learn this Course?Not only listening, thinking and waiting .But

3、 Exercise, Simulation, Practice!,课程简介,课程代码：111C0120参考书阎石, 数字电子技术基础, 第5版, 高等教育出版社, 2006.王金明著，数字系统设计与Verilog HDL，电子工业出版社，第5版补充讲义/期中考试前预备Stanford 大学 108A课程notes.R.H.Katz, G.Borriello, Contemporary Logic Design, second edition,电子工业出版社, 2005.M.M.Mano, 数字设计(第四版), 电子工业出版社, 2010.http:/ 2016 ZDMC Lec. #1 8,O

4、ther Course Info,Website:http:/ 暂停Check frequently答疑玉泉信电楼308室/周四下午2:30-5:00上课课间、课后均可Email，微信群，短信均可,Grading (考核),Final grades will be computed approximately as follows:期中考试-10%课程作业+小测验+上课出勤率+Project - 20%Class Room CheckHomework Sets作业上交截止期为课后一周内有效Project 2 projects (1 or 2 members team)Project-2可选（总

5、评加分35分，但不超过平时成绩范围）Finial Exam期末闭卷考试 - 70%,授课时间和地点：,2016年春夏学期，周二上午，第3、4节(9:50-11:25)星期四上午，第1、2节(08:00-09:35)地点：紫金港西1-520(多)http:/ 2016 ZDMC Lec. #1 8,课程结构,数字理论知识(必备)数字系统和编码、逻辑代数、门电路数字电路分析与设计组合逻辑电路触发器、半导体存贮器、可编程器件时序逻辑电路脉冲电路与接口控制器与数字系统状态机控制器微码控制器测试和验证微处理器简介,9,Spring 2016 ZDMC Lec. #1 8,第七章 半导体存储器,A maj

6、or advantage of digital over analog systems is the ability to store easily large quantities of digital information and data for short or long periods.,10,Spring 2016 ZDMC Lec. #1 8,第七章 半导体存储器 memory devices,7.1 概述能存储大量二值信息的器件一、一般结构形式,！单元数庞大！输入/输出引脚数目有限,flip-flop?,11,Spring 2016 ZDMC Lec. #1 8,二、分类1、

7、从存/取功能分：只读存储器(Read-Only-Memory）随机读/写（Random-Access-Memory）2、从工艺分：双极型MOS型,12,Spring 2016 ZDMC Lec. #1 8,7.2 ROM-READ-ONLY MEMORIES7.2.1 掩模ROM一、结构,13,Spring 2016 ZDMC Lec. #1 8,二、举例,14,Spring 2016 ZDMC Lec. #1 8,D0Dm,15,Spring 2016 ZDMC Lec. #1 8,两个概念：存储矩阵的每个交叉点是一个“存储单元”，存储单元中有器件存入“1”，无器件存入“0”存储器的容量：“

8、字数 x 位数”,16,Spring 2016 ZDMC Lec. #1 8,掩模ROM的特点：出厂时已经固定，不能更改，适合大量生产简单，便宜，非易失性nonvolatile,ROM ARCHITECTURE,17,Spring 2016 ZDMC Lec. #1 8,Typical timing for a ROM read operation.,18,Spring 2016 ZDMC Lec. #1 8,19,Spring 2016 ZDMC Lec. #1 8,7.2.2 可编程ROM（PROM）Programmable ROMs,总体结构与掩模ROM一样，但存储单元不同,“one-t

9、ime programmable” (OTP) ROMs,20,Spring 2016 ZDMC Lec. #1 8,7.2.2 可编程ROM（PROM）,总体结构与掩模ROM一样，但存储单元不同,写入时，要使用编程器,21,Spring 2016 ZDMC Lec. #1 8,7.2.3 可擦除的可编程ROM（EPROM）Erasable Programmable ROM,总体结构与掩模ROM一样，但存储单元不同一、用紫外线擦除的PROM（UVEPROM）,nonvolatile,22,Spring 2016 ZDMC Lec. #1 8,23,Spring 2016 ZDMC Lec. #

10、1 8,24,Spring 2016 ZDMC Lec. #1 8,二、电可擦除的可编程ROM（E2PROM）Electrically Erasable PROM总体结构与掩模ROM一样，但存储单元不同,Without a UV light source and a special PROM programmer unit,25,Spring 2016 ZDMC Lec. #1 8,Electrically Erasable PROM,Another advantage of the EEPROM over the EPROM is the ability to erase and rewri

11、te individual bytes (eight-bit words) in the memory array electrically.This byte erasability makes it much easier to make changes in the data stored in an EEPROM.The early EEPROMs, such as Intels 2816, required appropriate support circuitry external to the memory chips, included the 21-V programming

12、 voltage (VPP).The newer devices, such as the Intel 2864, have integrated this support circuitry onto the same chip with the memory array, it requires only a single 5-V power pin.,26,Spring 2016 ZDMC Lec. #1 8,Timing for the write operation.,27,Spring 2016 ZDMC Lec. #1 8,28,Spring 2016 ZDMC Lec. #1

13、8,三、快闪存储器（Flash Memory）为提高集成度，省去T2（选通管）改用叠栅MOS管（类似SIMOS管）,The challenge for semiconductor engineers was to fabricate a nonvolatile memory with the EEPROMs in-circuit electrical erasability, but with densities and costs much closer to those of EPROMs, while retaining the high-speed read access of bot

14、h.,Trade-offs for semiconductor nonvolatile memories show that complexity and cost increase as erase and programming flexibility increases.,A typical flash memory has a write time of 10 ms per byte compared to 100 for the most advanced EPROM and 5 ms for EEPROM (which includes automatic byte erase t

15、ime).,29,Spring 2016 ZDMC Lec. #1 8,30,Spring 2016 ZDMC Lec. #1 8,7.3 随机存储器RAM random-access memory,7.3.1 静态随机存储器（SRAM）STATIC RAM一、结构与工作原理,31,Spring 2016 ZDMC Lec. #1 8,32,Spring 2016 ZDMC Lec. #1 8,二、SRAM的存储单元,六管N沟道增强型MOS管,Logic symbols,(a) the 2147H RAM chip;(b) the MCM6206C RAM.,33,Spring 2016 ZD

16、MC Lec. #1 8,Symbol and mode table for the CMOS MCM6264C.,34,Spring 2016 ZDMC Lec. #1 8,35,Spring 2016 ZDMC Lec. #1 8,7.3.2* 动态随机存储器（DRAM）DYNAMIC RAM动态存储单元是利用MOS管栅极电容可以存储电荷的原理,Dynamic RAMs store 1s and 0s as charges on a small MOS capacitor (typically a few picofarads).In modern DRAM chips, each mem

17、ory cell must be refreshed typically every 2, 4, or 8 ms, or its data will be lost.,Cell arrangement in a dynamic RAM,DRAM TECHNOLOGYMemory Modulessingle-in-line memory module (SIMM)dual-in-line memory module (DIMM)SODIMMRIMMDRDRAMFPM DRAMEDO DRAMSDRAMDDRSDRAMSLDRAMDRDRAM,36,Spring 2016 ZDMC Lec. #1

18、 8,Simplified architecture of the TMS44100 ; RASCAS timing,37,Spring 2016 ZDMC Lec. #1 8,38,Spring 2016 ZDMC Lec. #1 8,7.4 存储器容量的扩展,7.4.1 位扩展方式适用于每片RAM,ROM字数够用而位数不够时接法：将各片的地址线、读写线、片选线并联即可,例：用八片1024 x 1位 1024 x 8位的RAM,39,Spring 2016 ZDMC Lec. #1 8,7.4.2 字扩展方式,适用于每片RAM,ROM位数够用而字数不够时,例：用四片256 x 8位1024

19、x 8位 RAM,40,Spring 2016 ZDMC Lec. #1 8,41,Spring 2016 ZDMC Lec. #1 8,42,Spring 2016 ZDMC Lec. #1 8,43,Spring 2016 ZDMC Lec. #1 8,44,Spring 2016 ZDMC Lec. #1 8,7.5 用存储器实现组合逻辑函数,一、基本原理从ROM的数据表可见：若以地址线为输入变量，则数据线即为一组关于地址变量的逻辑函数,45,Spring 2016 ZDMC Lec. #1 8,7.5 用存储器实现组合逻辑函数,一、基本原理从ROM的数据表可见：若以地址线为输入变量，则

20、数据线即为一组关于地址变量的逻辑函数,46,Spring 2016 ZDMC Lec. #1 8,47,Spring 2016 ZDMC Lec. #1 8,二、举例,48,Spring 2016 ZDMC Lec. #1 8,SPECIAL MEMORY FUNCTIONS,Cache MemoryFirst-In, First-Out Memory (FIFO)Circular Buffers,49,Spring 2016 ZDMC Lec. #1 8,PC to Memory,(a) CPU address bus driving ROM or static-RAM memory;(b)

21、 CPU addresses driving a multiplexer that is used to multiplex the CPU address lines into the DRAM.,50,Spring 2016 ZDMC Lec. #1 8,Function Generator,51,Spring 2016 ZDMC Lec. #1 8,52,Spring 2016 ZDMC Lec. #1 8,课后作业,1. 查阅：国际上的数字相关集成电路公司的EPROM,EEPROM,FlashROM,RAM,DRAM,SDRAM芯片的型号、接口类型、速度图书馆资源：电子器件天地, 软件; ftp:/10.13.71.58/2. 习题：/课本P383HW10: 7.2, 7.5, 7.9, 7.12, 7.14 ；（5月5日前交）3. 阅读：ch7.4-7.5;Ch8.1-8.5Ch 10.4-10.6,