DE2-115实验板引脚配置信息DE2-115开发板:目标芯片Cyclone IV E EP4CE115F29C7;存储器:64MB x2 SDRAM、2MB SRAM、8MB Flash;通信端口:10/100/1000以太网口 x2、USB 2.0时钟:50MHz x3 振荡器、SMA in/out Altera 配置芯片 EPCS64表 1 拨动开关引脚配置 Signal NameFPGA Pin No.DescriptionI/O StandardSW0PIN_AB28Slide Switch0Depending on JP7SW1PIN_AC28Slide Switch1Depending on JP7SW2PIN_AC27Slide Switch2Depending on JP7SW3PIN_AD27Slide Switch3Depending on JP7SW4PIN_AB27Slide Switch4Depending