精选优质文档-倾情为你奉上五.详细代码1 CPU例化library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;- Uncomment the following library declaration if instantiating- any Xilinx primitives in this code.library UNISIM;-use UNISIM.VComponents.all;entity CPU isport(CLK: in std_logic;RST:instd_logic;DBUS: inout std_logic_vector(15 downto 0); ABUS: out std_logic_vector(15 downto 0);
