1、Lecture on High Performance Processor Architecture(CS05162),An HFall 2009School of Computer Science and TechnologyUniversity of Science and Technology of China,How to Study Computer Architecture,2018/9/29,CS of USTC AN Hong,2,内容提要,国外教学情况综述（计算机系统结构专业课程体系，先修课程，教材，教学目标，教学内容和课时安排，作业，实验，考试，成绩评定，课程特色）加州大学
2、伯克利分校（UC Berkeley）斯坦福大学（Stanford）威斯康辛大学（WISC）麻省理工（MIT）卡内基梅隆大学（CMU）中国科大计算机体系结构相关课程的教改思路,2018/9/29,CS of USTC AN Hong,3,2018/9/29,CAS ICT AN Hong,3,理解现代计算机系统设计的影响因素,2018/9/29,CS of USTC AN Hong,4,1-4,理解现代计算机系统设计的抽象层次,软件,硬件,2018/9/29,CS of USTC AN Hong,5,2018/9/29,USTC CS AN Hong,5,了解现代计算机系统的设计和制造过程,20
3、18/9/29,CS of USTC AN Hong,6,掌握核心和前沿的计算机系统结构专业理论和技术,理论课课程体系,2018/9/29,中国科学技术大学 计算机科学与技术学院,6,数字集成电路,数字系统设计,计算机组成,串行机器语言 (ISA),编译技术,程序设计(算法+数据结构+语言),计算机系统导论,片上多处理器体系结构,计算机体系结构,并行计算机体系结构(硕),模拟/光电/可重构(博)集成电路,VLSI测试与可测性设计（硕）,并行系统嵌入式系统（硕）,并行机器语言 (ISA),并行程序设计（硕）(并行算法+并行语言),并行编译技术（硕）,计算机系统性能评价与预测(博),本科阶段（核心
4、知识）,研究生阶段（前沿知识）,2018/9/29,CS of USTC AN Hong,7,加州大学伯克利分校（UC Berkeley）,2018/9/29,CS of USTC AN Hong,8,课程体系（UC Berkeley）,EECS150 Components and Design Techniques for Digital Systems(相当于CE-DIG数字逻辑)undergraduatewww-inst.eecs.berkeley.edu/cs150/fa05/CS152 Computer Architecture and Engineering(相当于CE-CAO计算
5、机组成) undergraduate/graduatewww-inst.eecs.berkeley.edu/cs152/CS252 Graduate Computer Architecture(相当于CE-CAO计算机体系结构)graduatehttp:/www.cs.berkeley.edu/culler/courses/cs252-s05/,2018/9/29,CS of USTC AN Hong,9,EECS 150 Components and Design Techniques for Digital Systems,教材R. H. Katz, G. Borriello, Conte
6、mporary Logic Design, 2nd Ed., Pearson Prentice-Hall, Upper Saddle River, NJ, 2005.Contemporary Logic Design, Second Edition教学目标Understand digital logic at the gate and switch level including both combinational and sequential logic elements. Understand clocking methodologies to manage information fl
7、ow and preservation of circuit state. Appreciate digital logic specification methods and the compilation process that transforms these into logic networks. Gain experience with computer-aided design tools for implementation with programmable logic devices. Appreciate the advantages/disadvantages bet
8、ween hardware and software implementations of a function.,2018/9/29,CS of USTC AN Hong,10,EECS 150 Components and Design Techniques for Digital Systems,教学内容Language of logic design（Verilog project skills）Boolean algebra, logic, state, timing, CAD toolsConcept of state in digital systemsAnalogous to
9、variables, program counters in softwareHow to specify/simulate/compile our designsHardware description languagesTools to simulate the workings of our designsLogic compilers to synthesize the hardware blocksMapping onto programmable hardware10个助教,2018/9/29,CS of USTC AN Hong,11,CS152 Computer Archite
10、cture and Engineering,课时每周3小时讲授（总60学时，周学时4，每学时45分钟） 每周2小时辅导2个助教先修课程EECS 150 Components and Design Techniques for Digital Systems,2018/9/29,CS of USTC AN Hong,12,CS152 Computer Architecture and Engineering,教材 Computer Organization and Design: The Hardware/Software Interface, Third Edition by David A.
11、 Patterson and John L. Hennessy.参考书Computer Architecture: A Quantitative Approach, Third Edition by John L. Hennessy and David A. Patterson. This is a more advanced text, used in CS252. It is available for occasional supplementary reading. 实验参考书See MIPS run by Dominic Sweetman, Morgan Kaufman Publis
12、hers. Provides an in-depth, easy to use guide to the MIPS instruction set, including special attention to processor control.MIPS RISC Architecture, Second Edition by Gerry Kane and Joe Heinrich, Prentice Hall. This provides a complete reference on the MIPS instruction set and has very nice treatment
13、 of pipelined design.,2018/9/29,CS of USTC AN Hong,13,CS152 Computer Architecture and Engineering,教学目标深刻理解现代数字计算机系统的内部工作原理，以及软硬件的设计折衷。用高级语言（如C或Java）写的程序如何转换成机器语言（机器指令），硬件是如何执行这些指令的？从而理解软件和硬件各自是如何影响程序性能的。软件和硬件之间的接口是什么？软件是如何指示硬件执行所需要的功能的？从而理解如何写好各种软件。程序的性能是由什么决定的？程序员应如何改进性能？从而理解源程序，软件的编译和优化，硬件的高效执行是如何
14、共同决定程序性能的。硬件设计人员如何改进计算机的性能？进一步的理解需要学习计算机体系结构：量化分析方法引导学生经历一个完整的设计过程，解决工程设计实际面临的问题理解复杂的硬件系统的设计流程，获得使用CAD工具设计硬件系统，体验在实际硬件上运行所做的设计。做出实际的硬件，而非模拟。最后的设计实现要在FPGA硬件上运行，通过用汇编语言程序对MIPS指令集的测试 。讨论现代计算机体系结构的快速变化，计算机设计未来的发展趋势,2018/9/29,CS of USTC AN Hong,14,CS152 Computer Architecture and Engineering,教学内容Computer
15、architecture historyInstruction set designComputer arithmeticPerformance and cost analysisData-path design and Controller design PipeliningCaches and memory systems, addressingNetworks interrupts and exceptionsInput-output systemsMicroprogrammingA survey of advanced architectures, real computers and
16、 microprocessors,2018/9/29,CS of USTC AN Hong,15,CS152 Computer Architecture and Engineering,课时安排（60学时，周学时4，共15周）ISA, arithmetic，technology & HDL，Proc. Design（6周）The MIPS ISASingle-Cycle DatapathsSingle-Cycle Wrap-UpTesting and TeamworkTimingPerformancePipelining IPipelining IIPipelining IIIVLSIMidt
17、erm Review Session in Class（复习）Midterm I: （期中考试，3小时）,2018/9/29,CS of USTC AN Hong,16,CS152 Computer Architecture and Engineering,课时安排（60学时，周学时4，共15周）Memory and I/O（4.5周）Memory Circuits and InterfacesCache ICache IIVirtual MemoryError Correcting CodesAdvanced Processors IAdvanced Processors IIAdvance
18、d Processors IIIBuses, Disks, and RAID,2018/9/29,CS of USTC AN Hong,17,CS152 Computer Architecture and Engineering,课时安排（60学时，周学时4，共15周）Networks and multiprocessors（3.5周）NetworksRoutersSynchronizationMultiprocessorsMidterm II Review in Class（复习）Midterm II:期中考试，3小时Last Day: “Lessons Learned” Group Pre
19、sentations（1周）,2018/9/29,CS of USTC AN Hong,18,CS152 Computer Architecture and Engineering,课程实践Most assignments consists of two partsIndividual Effort: Exercises from the text bookTeam Effort: Lab assignmentsComputer Design Team Projects: 分组的实验项目，每组45名学生, 每个学生要投入200个小时一系列的计算机设计项目实验是本课程的灵魂，分三个步骤实现一个M
20、IPS结构的子集，获得Register Transfer Level (RTL) 机器描述A single-cycle CPU design, 3weeksA pipelined CPU design, 3weeksA pipelined CPU with caches and a DRAM controller, 5weeks,2018/9/29,CS of USTC AN Hong,19,CS152 Computer Architecture and Engineering,作业要求: 2套The homeworks will be graded for effort (did you a
21、ttempt to solve each problem in a serious way?), not correctness. We will hand out the solutions to the homework at the mid-term review session, to help you study for the mid-term. You may talk about the homeworks with your fellow students, but the homework should represent your own attempt to solve
22、 the problem (no copying someone elses answers onto your sheet). The goal of the homeworks is to help you review the material BEFORE the mid-term review session, so that you will get the most out of the review.,2018/9/29,CS of USTC AN Hong,20,Computer Design Team Projects,Download CPU machine code u
23、sing TFTP,Program Xilinx via PC,DRAM,Xilinx Virtex E FPGA,Xilinx Virtex E 43,200 “parts” +655,000 RAM bits Write Verilog to “wire”parts.,Real hardware,2018/9/29,CS of USTC AN Hong,21,CS152 Computer Architecture and Engineering,实验要求：4个保持简单，使能工作（Keep it simple and make it work）Fully test everything in
24、dividually and then togetherRetest everything whenever you make any changesLast minute changes are something to avoid!交流是成功的关键（Group dynamics. Communication is the key to success）Be open with others of your expectations and your problemsEverybody should be there on design meetings when key decisions
25、 are made and jobs are assigned计划非常重要（Planning is very important）Promise what you can deliver; deliver more than you promiseMurphys Law: things DO break at the last minuteDont make your plan based on the best case scenariosFreeze you design and dont make last minute changes永不放弃！,2018/9/29,CS of USTC
26、 AN Hong,22,CS152 Computer Architecture and Engineering,成绩2次期中考试，无期末考试： 30%（10% + 20%）reduce the pressure of taking examscovering the material from the readings and classover a 3-hour period in early evening.4个实验：50%（2% + 8% + 15% + 25%）2个课外作业：3%（1% + 2%） 平时表现： 17%不接收任何迟交的作业和实验报告,2018/9/29,CS of UST
27、C AN Hong,23,CS152 Computer Architecture and Engineering,Lab 4: 25 %Lab 3: 15 %Lab 2: 8 %Lab 1: 2 %Subject tofine tuning .,2018/9/29,CS of USTC AN Hong,24,CS152 Computer Architecture and Engineering,Peer evals: Teammatesgrade eachother afterLabs 2, 3, 4.Rewards good“team players”,Lab work,Midterm ex
28、ams,HW,Evals,2018/9/29,CS of USTC AN Hong,25,CS152 Computer Architecture and Engineering,Lab work,Midterm exams,HW,Evals,MT1: Oct 4th.About 10% of final grade.MT2: Dec 6th.About 20% of final grade.3 hours,early evening,no calculatorsor electronicdevices.,In-class review session before each mid-term.
29、,2018/9/29,CS of USTC AN Hong,26,CS152 Computer Architecture and Engineering,Lab work,Midterm exams,HW,Evals,Homework dueat mid-term review session. Based on lastyears mid-term.Graded on effort, not correctness.NO latehomeworksaccepted.,May discuss HWs with other students, but work handed in must be
30、 your own.,2018/9/29,CS of USTC AN Hong,27,CS152 Computer Architecture and Engineering,课程特色强调课程设计:一个学期，每个学生要投入200小时，占总成绩的50%完成基于MIPS指令集的CPU设计，用标准单元实现，能在FPGA上运行了解现代处理器的设计流程微体系结构设计：C模拟器设计逻辑设计和综合：Verilog仿真器设计FPGA功能验证： 通过一系列汇编语言程序对MIPS指令集的测试,2018/9/29,CS of USTC AN Hong,28,CS252 Graduate Computer Archit
31、ecture,教材J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, 3rd Edition, Morgan Kaufmann Publishing Co., Menlo Park, CA. 2002.Readings in Computer Architecture, Mark Hill (Editor), Norman Jouppi (Editor), Gurindar Sohi (Editor), Morgan Kaufmann Publishing Co., Menlo
32、Park, CA. 1999,2018/9/29,CS of USTC AN Hong,29,CS252 Graduate Computer Architecture,教学目标focuses on the design and implementation of computer systems, as well as techniques for analyzing and comparing alternative computer organizations. take the broad view of computer architecture as it evolves - not
33、 just CPU design, but the places where hardware and software come together from tiny embedded devices to massive internet service platforms. learn about styles of computer implementation and organization from a historical and modern perspective. Students will also undertake a major computing systems
34、 analysis and design project of their own choosing.,2018/9/29,CS of USTC AN Hong,30,CS252 Graduate Computer Architecture,教学内容Traditional concepts such as pipelining, instruction-level parallelism, memory hierarchies, and input/output architectures will be discussed. Further, modern issues such as da
35、ta speculation, dynamic compilation, communication architecture, multiprocessors, and VLSI scaling concerns will be introduced and discussed. Cutting-edge paradigms such as low-power wireless, network processors, reliability, and scalable systems will be explored In addition to the textbook, this co
36、urse includes a number of readings from research papers. Such papers are important for a number of reasons, not the least of which is to understand that design decisions are not always black and white.,2018/9/29,CS of USTC AN Hong,31,斯坦福大学（Stanford）,2018/9/29,CS of USTC AN Hong,32,课程体系（ Stanford ）,E
37、E 108A Digital SystemsI undergraduatehttp:/www.stanford.edu/class/ee108a/EE 108B Digital Systems IIundergraduatehttp:/www.stanford.edu/class/ee108b/EE 282 Computer Systems Architecturegraduate and advance undergraduate studentshttp:/www.stanford.edu/class/ee282/,2018/9/29,CS of USTC AN Hong,33,课程体系（
38、 Stanford ）,EE 271 Introduction to VLSI SystemsCMOS VLSI Design, by Neil H.E. Weste and David Harris EE 273 Digital Systems EngineeringDigital Systems Engineering, by W.J. Dally, J.W. Poulton, Cambridge University Press, 1998EE 382 Processor Design Basic cycle time, processor area tradeoffs, and pro
39、cessor design studies. Vector processors, multiple instruction issue processors and shared memory multiprocessors. Queuing analysis of memory systems and I/O systems. Prerequisite: EE 282 or equivalent No longer offered. EE 382A Advanced Processor ArchitectureModern Processor Design: Fundamentals of
40、 Superscalar Processors, by J.P. Shen and M. Lipasti, 1st edition, McGraw-Hillhttp:/www.stanford.edu/class/ee382a/EE 382B Parallel Computer Architecture and Programming,2018/9/29,CS of USTC AN Hong,34,课程体系（ Stanford ）,EE 385B Computer Architecture Seminar Discussions of research problems in computer
41、 organization, memory hierachy, machine representation, and emulation of conventional and abstract machines. No longer offered. EE 486 Advanced Computer Arithmetic “Advanced Computer Arithmetic Design”, by M.J. Flynn and S. Oberman; Pub J Wiley 2001Number systems, floating point representation, stat
42、e of the art in arithmetic algorithms, problems in design of high speed arithmetic units. Prerequisite: EE 282. Not offered 03/04,2018/9/29,CS of USTC AN Hong,35,EE 108A Digital SystemsI,教材There is no required text. The course will be taught from class notes handed out periodically throughout the qu
43、arter教学目标An introduction to digital circuits and their applicationsThe course is an introduction to digital systems design. It gives the student a working knowledge of the design and analysis of combinational logic, finite-state-machines, system partitioning, timing and synchronization. The course p
44、resents this material in the context of modern digital design using a high level hardware description language, Verilog, and synthesis to an FPGA for implementation.,2018/9/29,CS of USTC AN Hong,36,EE 108A Digital SystemsI,教学内容Digital circuit, logic and system design Digital representation of inform
45、ation MOS logic circuits Combinational logic design Logic building blocks, idioms and structured design Sequential logic design and timing analysis Clocks and synchronization Finite state machines Microcode control Digital system design Control and datapath partitioning,2018/9/29,CS of USTC AN Hong,
46、37,EE108B Digital Systems II,课时每周1小时15分讲授，另外每周有50分钟review sessions 4 TAs先修课程： EE 108A Digital SystemsI,2018/9/29,CS of USTC AN Hong,38,EE108B Digital Systems II,教材Computer Organization & Design: The Hardware/Software Interface, David A. Patterson and John L. Hennessy, 3rd Edition, Morgan-Kaufmann, 2
47、005.,2018/9/29,CS of USTC AN Hong,39,EE108B Digital Systems II,教学目标NA教学内容主要介绍基于处理器的数字系统设计，主要内容包括指令集，寻址模式，数据类型，汇编语言编程，底层数据结构，此外简单介绍了操作系统、编译器、处理器微结构、微码，流水线，存储系统和Cache，输入/输出，中断，总线，DMA，系统设计选择，软硬件折衷等课程实验主要是在FPGA原型系统上实现一个处理器设计,2018/9/29,CS of USTC AN Hong,40,EE108B Digital Systems II,课时安排Midterm Exam前Intr
48、oduction, course overview MIPS ISA I: operands and operations MIPS ISA II: data and control transferMIPS ISA III: loops, case stmts, procedures Compilers, linking, loading ALU design and Performance Processor building block: simple processor Improving performance with parallelism/pipelining Pipeline
49、 Hazards Midterm Exam,2018/9/29,CS of USTC AN Hong,41,EE108B Digital Systems II,课时安排Midterm Exam后Pipeline Hazards Memory Hierarchy I Memory Hierarchy II Interrupts and Exceptions Operating System basics I: Virtual memory Operating system basics II: Processes I/O devices Buses and Interfacing I/O system design & Review Final Exam,
