精选优质文档-倾情为你奉上1. Shown below are buffer-chain designs. (1) Calculate the minimum delay of a chain of inverters for the overall effective fan-out of 64/1. Solution：由题可知：根据经验为最合适的值，所以，所以，但是级数必须为整数所以取，又因为，所以：，所以。(2) Using HSPICE and TSMC 0.18 um CMOS technology model with 1.8 V power supply, design a circuit simulation scheme to verify them with their correspondent parameters of N, f, and tp.Solution:根据（1）中计算知道三级最合适，所以验证如下：A）、一级无负载测本征延时代码如下：.title buffer-chain 1.lib C:syn
