1、ITO薄膜晶体管辅助层的文献调研,薄膜晶体管与先进显示技术实验室,姓名：刘洋学号：1101213713研究小组：TFT一组,Thin Film Transistor and Advanced Display Lab,组会汇报,文献调研实验进展下一步实验计划,汇报内容,文献调研背景,目前在实验室制备的ITO TFT器件中，迁移率不高10cm2/vs，且有源层厚度在10nm左右，厚度太薄易产生其他问题，如不同区域器件特性不均匀，实验可重复性差；另一方面，实验证实IGZO作为辅助层的ITO TFT迁移率有所提高 ，因此希望找到其他的辅助层材料实现调节阈值电压，提高迁移率的作用，比如ZTO。,图1 I
2、TO TFT Id-Vg转移特性图,图2 ITO/IGZO TFT Id-Vg转移特性图,文献调研一,器件结构：Bottom gate structure工艺流程：Mo栅 SiO2栅介质：PECVD 380，120nm ITO层：O2/Ar+O2=44%，0.26Pa，DC power density 2.2W/cm2 ZTO层：Zn:Sn=70:30，magnetron sputter The active area was defined using a shadow mask during deposition of the ZTO/ITO film.(W/L=1000 m/15 m)
3、ITO源/漏：DC sputter 退火：空气中1h 500,Ji-In Kim, K.H. Ji, H. Y. Jung, etc,” Improvement in both mobility and bias stability of ZnSnO transistors by inserting ultra-thin InSnO layer at the gate insulator/channel interface”, Applied Physic Letters 99, 122102 (2011).,文献调研一,FIG. 3. (Color online) Evolution of
4、the transfer characteristics of the (a)ZTO and (b) ZTO/ITO (3.5 nm) devices as a function of the negative bias stress (-BS) time, and (c) ZTO and (d) ZTO/ITO (3.5 nm) devices as a function of the positive bias stress (+BS) time,“The interfacial ITO layer not only provides a fast carrier path but als
5、o reduces the interfacial trap density.”,Ji-In Kim, K.H. Ji, H. Y. Jung, etc,” Improvement in both mobility and bias stability of ZnSnO transistors by inserting ultra-thin InSnO layer at the gate insulator/channel interface”, Applied Physic Letters 99, 122102 (2011).,文献调研一,FIG. 4. (Color online) (a)
6、 The +BS and -BS-induced Vth variations for the ZTO/ITO devices with increasing ts. The evolution of the Vth variations for the (b) reference and (c) optimal bi-layer devices under thermal stress from 298 to 378 K. (d) EA as a function of VGS for the reference and ZTO/ITO(3.5 nm) devices.,Ji-In Kim,
7、 K.H. Ji, H. Y. Jung, etc,” Improvement in both mobility and bias stability of ZnSnO transistors by inserting ultra-thin InSnO layer at the gate insulator/channel interface”, Applied Physic Letters 99, 122102 (2011).,The negative Vth shift with increasing measurement temperature was attributed to th
8、e generation of thermally activated carriers from the trap states at the gate insulator/channel or in the band gap of ZTO. The falling rates of the activation energy (EA) were 0.376 eV/V and 0.602 eV/V for the ZTO and optimal bi-layer devices, respectively. The faster falling rate of the ZTO/ITO (3.
9、5 nm) devices suggests that the interfacial trap density (Dit) can be decreased by the insertion of a very thin ITO film into the ZTO/SiO2 reference device. This interpretation is in line with the superior mobility and reliability for this device.,文献调研二,器件结构：Bottom gate structure工艺流程：C-Si 衬底/栅 SiO2栅
10、介质：PECVD 390，120nm ITO/ZTO层：DC/RF magnetron sputter Al源/漏：电子束蒸发，200nm All the patterning processes were performed using a shadow mask during deposition. 退火：125,H. Wakana, T. Kawamura, K. Fujii, etc,” Amorphous ZTO/ITO Stacked-Channel TFTs with Field Effect Mobility over 50 cm2/Vs and Resistant to Ch
11、annel Thickness Dispersion ”, SID Symposium Digest of Technical Papers Volume 41, Issue 1, pages 12871290, (2010).,Fig 5.Schematic cross-section of the TFT structure with ZTO/ITO channel layer (a), and top view of a unit TFT.,Fig 6. Cross sectional TEM image of the TFT with ZTO/ITO channel layer.,文献
12、调研二,H. Wakana, T. Kawamura, K. Fujii, etc,” Amorphous ZTO/ITO Stacked-Channel TFTs with Field Effect Mobility over 50 cm2/Vs and Resistant to Channel Thickness Dispersion ”, SID Symposium Digest of Technical Papers Volume 41, Issue 1, pages 12871290, (2010).,Fig 7.Transfer characteristics of TFTs wi
13、th various channel materials including (a) IGZO(25 nm), (b) ZTO(25 nm), (c) ITO(5 nm), and (d) ZTO(50 nm)/ITO(5 nm).,文献调研二,H. Wakana, T. Kawamura, K. Fujii, etc,” Amorphous ZTO/ITO Stacked-Channel TFTs with Field Effect Mobility over 50 cm2/Vs and Resistant to Channel Thickness Dispersion ”, SID Sym
14、posium Digest of Technical Papers Volume 41, Issue 1, pages 12871290, (2010).,Fig 8.The variations of Vth and Ion of the ZTO(50 nm)/ITO TFTs as a function of the ITO thickness.,Fig 9.The variations of Vth and Ion of the ZTO/ITO (5 nm) TFTs as a function of the ZTO thickness.,At a ZTO thickness of 75
15、 nm, the Ionof the TFTs decreased. This is because the resistance between the charge conductance channel and the Al electrode increased with an increase in the ZTO channel thickness. In other words, the ZTO layer acts as suppression layer for the Vth dispersion. If oxygen and zinc are diffused in th
16、e ITO layer during the ZTO deposition, they are supposed to suppress the carrier in the ITO layer.,文献调研总结,ZTO作为辅助层的优点：1、与IGZO相比，无In元素，成本更低；2、非晶态，且在较高温度下退火依旧是非晶；3、潜在的优点，如文献描述，正负偏压下阈值电压漂移更小，有源层厚度对 阈值电压影响更小等。,实验进展,新溅射台制备不同厚度有源层的ITO TFT：工艺条件：Mo栅：DC溅射功率200W，0.36Pa，Ar:O2=50:0，8E-4； Al2O3栅介质：RF溅射功率300W，0.9Pa，Ar:O2=100:30，6E-4； ITO有源层：RF溅射功率80W，Ar:O2=35:5，1.0Pa，6E-4， #15-175/10/15nm； ITO源/漏：DC溅射60W，Ar:O2=39:1.3，1.0Pa，6E-4.实验结果：待测。,下一步研究计划,1、制备不同组分Zn:Sn的ZTO薄膜，熟知相应的工艺制备条件；2、研究不同组分的ZTO辅助层对ITO沟道特性的影响，从而探究Sn，Zn以及O原子的具体作用，最终得到高迁移率的ITO薄膜晶体管。薄膜部分具体的工艺参数需要和张曙光合作商定。,ITO薄膜晶体管辅助层的文献调研,汇报完毕，请各位指导！,
