1、启动函数中有各个中断处理函数名称!startup_stm32f40_41xxx.ssystem_stm32f4xx.c系统初始化函数SystemInit();/配置系统时钟系统内核变量SystemCoreClock variable改变系统时钟SystemCoreClockUpdate()配置好的是 168MSysclock，Hclk168000000* AHB Prescaler | 1*-* APB1 Prescaler | 4*-* APB2 Prescaler | 2#if defined (STM32F40_41xxx)uint32_t SystemCoreClock = 16800
2、0000; /在这里设置系统的时钟#endif /* STM32F40_41xxx */配置系统时钟，PLL，分频比， AHB/APBx 分频比，flash 设置static void SetSysClock(void)每次 hclk 改变后必须调用这个来更新系统时钟void SystemCoreClockUpdate(void)typedef enum Bit_RESET = 0,Bit_SETBitAction;枚举类型：为数定义一个别名，这样好区分，引用的时候好引用枚举型是预处理 指令#define 的替代。一；结束一般的定义方式如下：enum enum_type_nameENUM_CO
3、NST_1,ENUM_CONST_2,.ENUM_CONST_n enum_variable_name;注意：enum_type_name 是自定义的一种数据数据类型名 ，而 enum_variable_name 为enum_type_name 类型的一个变量，也就是我们平时常说的枚举变量。实际上 enum_type_name 类型是对一个变量取值范围的限定，而花括号内是它的取值范围，即 enum_type_name 类型的变量enum_variable_name 只能取值为花括号内的任何一个值，如果赋给该类型变量的值不在列表中，则会报错或者警告。ENUM_CONST_1、ENUM_CONST
4、_2 、.、ENUM_CONST_n，这些成员都是常量，也就是我们平时所说的枚举常量（常量一般用大写）例如：typedef enum GPIO_Mode_IN = 0x00, /*! GPIO Input Mode */GPIO_Mode_OUT = 0x01, /*! GPIO Output Mode */GPIO_Mode_AF = 0x02, /*! GPIO Alternate function Mode */GPIO_Mode_AN = 0x03 /*! GPIO Analog Mode */GPIOMode_TypeDef;这个 GPIOMode_TypeDef 是个类似于 int
5、 的枚举类型，定义变量时：GPIOMode_TypeDef GPIO_MODE；这个 GPIO_MODE 只能取上边的那四个值typedef structuint32_t GPIO_Pin; /*! Specifies the GPIO pins to be configured.This parameter can be any value of ref GPIO_pins_define */GPIOMode_TypeDef GPIO_Mode; /*! Specifies the operating mode for the selected pins.This parameter can
6、 be a value of ref GPIOMode_TypeDef */GPIOSpeed_TypeDef GPIO_Speed; /*! Specifies the speed for the selected pins.This parameter can be a value of ref GPIOSpeed_TypeDef */GPIOOType_TypeDef GPIO_OType; /*! Specifies the operating output type for the selected pins.This parameter can be a value of ref
7、GPIOOType_TypeDef */GPIOPuPd_TypeDef GPIO_PuPd; /*! Specifies the operating Pull-up/Pull down for the selected pins.This parameter can be a value of ref GPIOPuPd_TypeDef */GPIO_InitTypeDef;这是个结构体，只不过这个结构体里面的额成员都是枚举类型的成员，且这个结构体也是枚举类型的，是为了方便区分和避免出错。使用的时候还是要 GPIO_InitTypeDef GPIO_InitStruct 来定义一个结构体Uin
8、t8_t Uint16_t目前还是先使用这个厂家的库函数比较好，因为时间不允许，但是应该效率差不多，因为可能只是库函数版本不同罢了。目录结构：四个文件夹：用户：MDK-ARM：驱动库函数：CMSIS：Cmsis 中的必须的文件是：Stm32f4xx.hCcore_cm4.hStm32f4xx.it.cStartup_stm32f40_41xxx.ssystem_stm32f4xx.c库函数驱动中必须的是：Crc.cRcc.cMisc.cSyscfg.c然后用到什么外设就把外设添加进来 时钟设置：Rcc：复位与实时钟控制内外部时钟，PLL系统，总线时钟配置外设时钟配置中断和标志位管理一复位和时钟
9、控制1 内外部时钟，pll 锁相环，时钟输出，时钟保护配置=外设默认都用 HIS（16m） speed，开始都是关闭的除了 sram 和 flashIo 口都是输入（input floating）状态Once the device started from reset, the user application has to: (+) Configure the clock source to be used to drive the System clock(if the application needs higher frequency/performance)(+) Configure
10、 the System clock frequency and Flash settings (+) Configure the AHB and APB busses prescalers(+) Enable the clock for the peripheral(s) to be used(+) Configure the clock source(s) for peripherals which clocks are notderived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG系统时钟复位函数void RCC_D
11、eInit(void)The default reset state of the clock configuration is given below:* - HSI ON and used as system clock source* - HSE, PLL and PLLI2S OFF* - AHB, APB1 and APB2 prescaler set to 1.* - CSS, MCO1 and MCO2 OFF* - All interrupts disabledThis function doesnt modify the configuration of the* - Per
12、ipheral clocks * - LSI, LSE and RTC clocks使用外部时钟函数：void RCC_HSEConfig(uint8_t RCC_HSE)arg RCC_HSE_OFF: turn OFF the HSE oscillator, HSERDY flag goes low after* 6 HSE oscillator clock cycles.* arg RCC_HSE_ON: turn ON the HSE oscillator* arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock内
13、部高频时钟校准函数（因受温度等的影响）void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue)HSICalibrationValue: specifies the calibration trimming value.* This parameter must be a number between 0 and 0x1F.使能或关闭内部高频时钟void RCC_HSICmd(FunctionalState NewState)* param NewState: new state of the HSI.* This param
14、eter can be: ENABLE or DISABLE.使能或关闭外部低频振荡器void RCC_LSEConfig(uint8_t RCC_LSE)arg RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after* 6 LSE oscillator clock cycles.* arg RCC_LSE_ON: turn ON the LSE oscillator* arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock使能或关闭内部低频
15、振荡器void RCC_LSICmd(FunctionalState NewState)param NewState: new state of the LSI.* This parameter can be: ENABLE or DISABLE.锁相环是一种反馈电路，其作用是使得电路上的时钟和某一外部时钟的相位同步。设置系统时钟等（非常重要）void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t PLLM, uint32_t PLLN, uint32_t PLLP, uint32_t PLLQ)RCC_PLLSource: specifies
16、the PLL entry clock source.arg RCC_PLLSource_HSI: HSI oscillator clock selected as PLL clock entry* arg RCC_PLLSource_HSE: HSE oscillator clock selected as PLL clock entryPLLM: specifies the division factor for PLL VCO input clockThis parameter must be a number between 0 and 63.* note You have to se
17、t the PLLM parameter correctly to ensure that the VCO input* frequency ranges from 1 to 2 MHz. It is recommended to select a frequency* of 2 MHz to limit PLL jitter.* * param PLLN: specifies the multiplication factor for PLL VCO output clock* This parameter must be a number between 192 and 432.* not
18、e You have to set the PLLN parameter correctly to ensure that the VCO* output frequency is between 192 and 432 MHz.* * param PLLP: specifies the division factor for main system clock (SYSCLK)* This parameter must be a number in the range 2, 4, 6, or 8.* note You have to set the PLLP parameter correc
19、tly to not exceed 168 MHz on* the System clock frequency.* * param PLLQ: specifies the division factor for OTG FS, SDIO and RNG clocks* This parameter must be a number between 4 and 15.* note If the USB OTG FS is used in your application, you have to set the* PLLQ parameter correctly to have 48 MHz
20、clock for the USB. However,* the SDIO and RNG need a frequency lower than or equal to 48 MHz to work* correctly.使能或是关闭锁相环void RCC_PLLCmd(FunctionalState NewState)* param NewState: new state of the main PLL. This parameter can be: ENABLE or DISABLE.* retval None使能或关闭时钟安全系统void RCC_ClockSecuritySystem
21、Cmd(FunctionalState NewState)This parameter can be: ENABLE or DISABLE.选择一种时钟源输出（PA8 引脚）pa8 需要设置为第二功能引脚void RCC_MCO1Config(uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div)arg RCC_MCO1Source_HSI: HSI clock selected as MCO1 source* arg RCC_MCO1Source_LSE: LSE clock selected as MCO1 source* arg RCC_MCO1So
22、urce_HSE: HSE clock selected as MCO1 source* arg RCC_MCO1Source_PLLCLK: main PLL clock selected as MCO1 source* param RCC_MCO1Div: specifies the MCO1 prescaler.* This parameter can be one of the following values:* arg RCC_MCO1Div_1: no division applied to MCO1 clock* arg RCC_MCO1Div_2: division by 2
23、 applied to MCO1 clock* arg RCC_MCO1Div_3: division by 3 applied to MCO1 clock* arg RCC_MCO1Div_4: division by 4 applied to MCO1 clock* arg RCC_MCO1Div_5: division by 5 applied to MCO1 clockPC9 同上void RCC_MCO2Config(uint32_t RCC_MCO2Source, uint32_t RCC_MCO2Div)=2Sys clk hclk， pclk1， pclk2 系统时钟，高速总线
24、，外设总线 时钟配置配置系统时钟void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource)默认是 HIS 作为系统时钟的 sys clock可以使用 RCC_GetSYSCLKSource()获得哪个时钟源作为系统时钟RCC_SYSCLKSource: specifies the clock source used as system clock.* This parameter can be one of the following values:* arg RCC_SYSCLKSource_HSI: HSI selected as system clo
25、ck source* arg RCC_SYSCLKSource_HSE: HSE selected as system clock source* arg RCC_SYSCLKSource_PLLCLK PLL selected as system clock source获得系统时钟uint8_t RCC_GetSYSCLKSource(void)* - 0x00: HSI used as system clock* - 0x04: HSE used as system clock* - 0x08: PLL used as system clock-配置高级高性能总线时钟（AHB） 之前的
26、hclk，时钟来源于 sys clock （系统时钟）void RCC_HCLKConfig(uint32_t RCC_SYSCLK)* param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from * the system clock (SYSCLK).* This parameter can be one of the following values:* arg RCC_SYSCLK_Div1: AHB clock = SYSCLK* arg RCC_SYSCLK_Div2: AHB clock =
27、 SYSCLK/2* arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4* arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8* arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16* arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64* arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128* arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256* arg RCC_SYSCLK_Div5
28、12: AHB clock = SYSCLK/512范围 最大 168m(#) For STM32F405xx/407xx and STM32F415xx/417xx devices, the maximum frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz. Depending on the device voltage range, the maximum frequency should be adapted accordingly:+-+ | Latency | HCLK clock f
29、requency (MHz) | |-| | | voltage range | voltage range | voltage range | voltage range | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V |-|-|-|-|-| |0WS(1CPU cycle)|0 HCLK = 30 |0 HCLK = 24 |0 HCLK = 22 |0 HCLK = 20 |-|-|-|-|-| |1WS(2CPU cycle)|30 HCLK = 60 |24 HCLK = 48 |22 HCLK =
30、44 |20 HCLK = 40 | |-|-|-|-|-| |2WS(3CPU cycle)|60 HCLK = 90 |48 HCLK = 72 |44 HCLK = 66 |40 HCLK = 60 |-|-|-|-|-| |3WS(4CPU cycle)|90 HCLK = 120|72 HCLK = 96 |66 HCLK = 88 |60 HCLK = 80 |-|-|-|-|-| |4WS(5CPU cycle)|120 HCLK = 150|96 HCLK = 120|88 HCLK = 110 |80 HCLK = 100 |-|-|-|-|-| |5WS(6CPU cycl
31、e)|150 HCLK = 168|120 HCLK = 144|110 HCLK = 132|100 HCLK = 120| |-|-|-|-|-| |6WS(7CPU cycle)| NA |144 HCLK = 168|132 HCLK = 154|120 HCLK = 140| |-|-|-|-|-| |7WS(8CPU cycle)| NA | NA |154 HCLK = 168|140 HCLK = 160|配置外设总线时钟 1（APB） ，之前的 PCLK，来源于 AHB(高性能总线时钟 HCLK)void RCC_PCLK1Config(uint32_t RCC_HCLK)This parameter can be one of the following values:* arg RCC_HCLK_Div1: APB1 clock = HCLK* arg RCC_HCLK_Div2: APB1 clock = HCLK/2* arg RCC_HCLK_Div4: APB1 clock = HCLK/4
