1、风扇主程序module fengshan(clk,rst,key1,key2,num,out_en,hex1,hex2);input clk,rst;input key1,key2;output 6:0 num;output 6:0 hex1,hex2;output out_en;reg6:0 num;reg out_en;wire clk_1hz;fenpin a(.clk_50mhz(clk),.clk_1hz(clk_1hz);shuma b(.num(num),.hex1(hex1),.hex2(hex2);always (posedge clk_1hz or negedge rst)
2、beginif(!rst)beginnum=6d59;out_en=1b0;endelse if(key1) beginnum=6d59;out_en=1b1;end else if(key2)beginnum=6d59;out_en=1b0;endelse beginif(num=6d0) begin num=6d59;out_en=out_en;endelse num=num-1b1;endendendmodule数码管module shuma(num,hex1,hex2);input 6:0 num;output reg 6:0 hex1,hex2;reg 6:0 num_g,num_s
3、;always (num)beginnum_g=num%10;num_s=num/10;case(num_g) 4d0:hex1=7hc0;4d1:hex1=7hf9;4d2:hex1=7ha4;4d3:hex1=7hb0;4d4:hex1=7h99;4d5:hex1=7h92;4d6:hex1=7h82;4d7:hex1=7hf8;4d8:hex1=7h80;4d9:hex1=7h90;default :hex1=7hc0;endcasecase(num_s) 4d0:hex2=7hc0;4d1:hex2=7hf9;4d2:hex2=7ha4;4d3:hex2=7hb0;4d4:hex2=7
4、h99;4d5:hex2=7h92;4d6:hex2=7h82;4d7:hex2=7hf8;4d8:hex2=7h80;4d9:hex2=7h90;default :hex2=7hc0;endcaseendendmodule分频module fenpin(clk_50mhz,clk_1hz);input clk_50mhz;output reg clk_1hz;reg31:0 count;always (posedge clk_50mhz)beginif(count=32d2500000) beginclk_1hz = clk_1hz;count=32d0;endelsecount = count + 1;endendmodule开关模块module key(clk_1hz,rst,key,out_aa);input clk_1hz,rst;input key;output out_aa;reg out_aa;always (posedge clk_1hz or negedge rst)beginif(!rst) out_aa=1b0;else beginif(key) out_aa=1b1;else out_aa=1b0;endendendmodule
